Smart Detector Cell: A Scalable All-Spin Circuit for Low Power Non-Boolean Pattern Recognition

TL;DR

This paper introduces a scalable, low-power all-spin logic circuit for non-Boolean pattern recognition, leveraging spintronic devices to outperform CMOS counterparts in size, speed, and energy efficiency.

Contribution

It presents the first fully spin-based pattern recognition circuit using all-spin logic devices, enabling compact, fast, and energy-efficient image recognition.

Findings

Smaller circuit footprint compared to CMOS

Lower power consumption and operational voltage

Faster decision times in pattern recognition

Abstract

We present a new circuit for non-Boolean recognition of binary images. Employing all-spin logic (ASL) devices, we design logic comparators and non-Boolean decision blocks for compact and efficient computation. By manipulation of fan-in number in different stages of the circuit, the structure can be extended for larger training sets or larger images. Operating based on the mainly similarity idea, the system is capable of constructing a mean image and compare it with a separate input image within a short decision time. Taking advantage of the non-volatility of ASL devices, the proposed circuit is capable of hybrid memory/logic operation. Compared with existing CMOS pattern recognition circuits, this work achieves a smaller footprint, lower power consumption, faster decision time and a lower operational voltage. To the best of our knowledge, this is the first fully spin-based complete pattern recognition circuit demonstrated using spintronic devices.