Mitigating Hardware Cyber-Security Risks in Error Correcting Decoders

TL;DR

This paper explores hardware cybersecurity vulnerabilities in channel decoders, demonstrating attack scenarios and proposing input randomization techniques to prevent malicious exploits without degrading decoding performance.

Contribution

It introduces novel mitigation methods based on input randomization to enhance hardware security of channel decoders against cyber-attacks.

Findings

Decoders are vulnerable to hardware cyber-attacks.

Input randomization effectively mitigates security risks.

Decoding performance remains unaffected by proposed methods.

Abstract

This paper investigates hardware cyber-security risks associated with channel decoders, which are commonly acquired as a black box in semiconductor industry. It is shown that channel decoders are potentially attractive targets for hardware cyber-security attacks and can be easily embedded with malicious blocks. Several attack scenarios are considered in this work and suitable methods for mitigating the risks are proposed. These methods are based on randomizing the inputs of the channel decoder to obstruct the communications between attackers and the malicious blocks, ideally without changing the decoding performance.