An event-based architecture for solving constraint satisfaction problems

TL;DR

This paper introduces a novel hybrid analog/digital hardware architecture that models CSPs as networks of oscillatory elements communicating via digital pulses, enabling efficient exploration of solution spaces.

Contribution

It presents a new hardware architecture for CSPs using oscillatory elements and demonstrates its robustness and effectiveness through prototype measurements.

Findings

Achieves state-of-the-art performance on CSPs

Prototype hardware is robust to practical non-idealities

Validates the theoretical model with experimental data

Abstract

Constraint satisfaction problems (CSPs) are typically solved using conventional von Neumann computing architectures. However, these architectures do not reflect the distributed nature of many of these problems and are thus ill-suited to solving them. In this paper we present a hybrid analog/digital hardware architecture specifically designed to solve such problems. We cast CSPs as networks of stereotyped multi-stable oscillatory elements that communicate using digital pulses, or events. The oscillatory elements are implemented using analog non-stochastic circuits. The non-repeating phase relations among the oscillatory elements drive the exploration of the solution space. We show that this hardware architecture can yield state-of-the-art performance on a number of CSPs under reasonable assumptions on the implementation. We present measurements from a prototype electronic chip to demonstrate that a physical implementation of the proposed architecture is robust to practical non-idealities and to validate the theory proposed.