Gate-tunable Memristive Phenonmena Mediated by Grain Boundaries in Single Layer MoS2

TL;DR

This paper introduces a novel memristor based on grain boundaries in single-layer MoS2, demonstrating gate-tunable resistance switching with high ratios and unique negative differential resistance, advancing 2D material-based memory technology.

Contribution

The study presents a new memristor design using grain boundaries in MoS2, enabling gate-tunable resistance switching and dynamic control not seen in traditional memristors.

Findings

Resistance switching ratios up to 1000

Gate-tunable set voltage via a third terminal

Observation of negative differential resistance

Abstract

Continued progress in high speed computing depends on breakthroughs in both materials synthesis and device architectures. The performance of logic and memory can be enhanced significantly by introducing a memristor, a two terminal device with internal resistance that depends on the history of the external bias voltage. State of the art memristors, based on metal insulator metal (MIM) structures with insulating oxides, such as TiO2, are limited by a lack of control over the filament formation and external control of the switching voltage. Here, we report a class of memristors based on grain boundaries (GBs) in single-layer MoS2 devices. Specifically, the resistance of GBs emerging from contacts can be easily and repeatedly modulated, with switching ratios up to 1000 and a dynamic negative differential resistance (NDR). Furthermore, the atomically thin nature of MoS2 enables tuning of the set voltage by a third gate terminal in a field-effect geometry, which provides new functionality that is not observed in other known memristive devices.