Energy-efficient hybrid spintronic-straintronic reconfigurable bit comparator
Ayan K. Biswas, Jayasimha Atulasimha, and Supriyo Bandyopadhyay

TL;DR
This paper introduces a reconfigurable, energy-efficient spintronic-straintronic bit comparator using nanowire spin valves, capable of high-speed operation with low power consumption and robustness against thermal noise.
Contribution
It presents a novel hybrid spintronic-straintronic design for a reconfigurable bit comparator that operates efficiently at room temperature.
Findings
Operates at approximately 416 MHz for a 16-bit comparator.
Consumes at most 420 aJ per cycle.
Robust against thermal noise at room temperature.
Abstract
We propose a reconfigurable bit comparator implemented with a nanowire spin valve whose two contacts are magnetostrictive with bistable magnetization. Reference and input bits are "written" into the magnetization states of the two contacts with electrically generated strain and the spin-valve's resistance is lowered if they match. Multiple comparators can be interfaced in parallel with a magneto-tunneling junction to determine if an N-bit input stream matches an N-bit reference stream bit by bit. The system is robust against thermal noise at room temperature and a 16-bit comparator can operate at roughly 416 MHz while dissipating at most 420 aJ per cycle.
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