Low latency protocol for transmission of measurement data from FPGA to Linux computer via 10 Gbps Ethernet link

TL;DR

This paper introduces FADE-10G, a low latency, reliable data transmission protocol from FPGA to Linux computers over 1 Gbps or 10 Gbps Ethernet, optimized for minimal FPGA resource use and CPU load.

Contribution

The paper presents a simple, open-source FPGA IP core and Linux driver for high-speed, low latency data transfer, adaptable for various measurement systems.

Findings

Successfully tested with 1 Gbps and 10 Gbps links

Minimal FPGA resource consumption achieved

Low CPU load in Linux DAQ system

Abstract

This paper presents FADE-10G - an integrated solution for modern multichannel measurement systems. Its main aim is a low latency, reliable transmission of measurement data from FPGA-based front-end electronic boards (FEBs) to a computer-based node in the Data Acquisition System (DAQ), using a standard Ethernet 1 Gbps or 10 Gbps link. In addition to transmission of data, the system allows the user to send reliably simple control commands from DAQ to FEB and to receive responses. The aim of the work is to provide a possible simple base solution, which can be adapted by the end user to his or her particular needs. Therefore, the emphasis is put on the minimal consumption of FPGA resources in FEB and the minimal CPU load in the DAQ computer. The open source implementation of the FPGA IP core and the Linux kernel driver published under permissive license facilitates modifications and reuse of the solution. The system has been successfully tested in real hardware, both with 1 Gbps and 10 Gbps links.