Instruction sequence size complexity of parity

TL;DR

This paper demonstrates that using an auxiliary Boolean register with complement instructions can significantly reduce the size of instruction sequences needed to compute parity functions, highlighting the benefits of auxiliary storage.

Contribution

It shows that auxiliary Boolean registers with complement instructions can shorten instruction sequences for parity functions, supporting the idea that auxiliary storage reduces program size.

Findings

Shorter instruction sequences are possible with auxiliary registers.

Complement instructions enable size reduction for parity computations.

Auxiliary storage supports program size efficiency.

Abstract

Each Boolean function can be computed by a single-pass instruction sequence that contains only instructions to set and get the content of Boolean registers, forward jump instructions, and a termination instruction. Auxiliary Boolean registers are not necessary for this. In the current paper, we show that, in the case of the parity functions, shorter instruction sequences are possible with the use of an auxiliary Boolean register in the presence of instructions to complement the content of auxiliary Boolean registers. This result supports, in a setting where programs are instruction sequences acting on Boolean registers, a basic intuition behind the storage of auxiliary data, namely the intuition that this makes possible a reduction of the size of a program.