Comparison of the time-averaged power losses in the insulated-gate bipolar transistors and the hybrid SIT-MOS thyristors

TL;DR

This study compares power losses in CSTBT and hybrid SITh-MOS thyristors using numerical simulations, revealing conditions under which the hybrid device can dissipate less power than the CSTBT.

Contribution

It introduces a detailed simulation analysis of switching losses in CSTBT and hybrid SITh-MOS thyristors, highlighting how charge carrier lifetime adjustments can optimize power dissipation.

Findings

HSMT has higher switching energy losses than CSTBT during turn-on and off.

Reducing charge carrier lifetime in HSMT decreases its switching losses.

Proper tuning of charge carrier lifetime allows HSMT to have lower average power dissipation than CSTBT.

Abstract

Two-dimensional numerical simulation of switching processes for equivalent silicon insulated gate bipolar transistors of CSTBT-type and hybrid SITh-MOS thyristors (HSMT) has been performed. It is shown that the energy of switching losses during turning on and off periods in HSMT is greater than in totaly equivalent CSTBT. Therefore, the time-averaged power Pav dissipated in HSMT is smaller than in equivalent CSTBT only for rather long total current pulse duration. However, lowering the lifetime of nonequilibrium charge carriers tnp in the SITh can significantly reduce switching losses of the whole HSMT, while maintaining its advantage for the static on state. Therefore, for each set of CSTBT parameters it seams to be possible to select up such tnp in "almost equivalent" HSMT that the averaged power dissipation in HSMT will be less, than in equivalent CSTBT, for any set ranges of current pulse amplitude and duration.