Lattice QCD with Domain Decomposition on Intel Xeon Phi Co-Processors

TL;DR

This paper presents a domain decomposition solver for Lattice QCD optimized for Intel Xeon Phi co-processors, significantly reducing data movement and achieving high scalability and performance.

Contribution

It introduces a novel domain decomposition algorithm tailored for Xeon Phi architectures, improving scalability and efficiency over standard solvers.

Findings

Achieves close-to-linear scaling on 60 cores of KNC

Sustains 400-500 Gflop/s per chip with mixed precision

Reduces time-to-solution by a factor of 5 compared to standard solvers

Abstract

The gap between the cost of moving data and the cost of computing continues to grow, making it ever harder to design iterative solvers on extreme-scale architectures. This problem can be alleviated by alternative algorithms that reduce the amount of data movement. We investigate this in the context of Lattice Quantum Chromodynamics and implement such an alternative solver algorithm, based on domain decomposition, on Intel Xeon Phi co-processor (KNC) clusters. We demonstrate close-to-linear on-chip scaling to all 60 cores of the KNC. With a mix of single- and half-precision the domain-decomposition method sustains 400-500 Gflop/s per chip. Compared to an optimized KNC implementation of a standard solver [1], our full multi-node domain-decomposition solver strong-scales to more nodes and reduces the time-to-solution by a factor of 5.