Compact Model of Nanowire Tunneling FETs Including Phonon-Assisted Tunneling and Quantum Capacitance

TL;DR

This paper presents a physics-based compact model for silicon GAA nanowire tunneling FETs that incorporates phonon-assisted tunneling and quantum capacitance effects, accurately fitting experimental data across device sizes.

Contribution

The model uniquely includes phonon-assisted tunneling and quantum capacitance transition, improving accuracy and applicability for device scaling analysis.

Findings

Model accurately fits measured transfer characteristics.

Incorporates phonon-assisted tunneling with Lorentzian DOS broadening.

Captures transition from quantum to classical capacitance regimes.

Abstract

A physics-based compact model for silicon gate-all-around (GAA) nanowire tunneling FETs (NW-tFETs) with good accuracy has been developed by considering Phonon-Assisted Tunneling (PAT) and transition from Quantum Capacitance Limit (QCL) to Classical Limit (CL) during the device-size scaling. The impact of PAT results in the broadening of a single electron-energy level to an energy band with density-of-states (DOS) distribution of Lorentzian shape. As a consequence, the tunneling probability at the edge of tunneling window no longer changes abruptly from zero to having a finite value. By adjusting the parameters in the Lorentzian function, an accurate fitting to the measured transfer characteristics in the subthreshold region is made possible. Besides, with an analytical formula to calculate the channel potential, the model is able to cover naturally the transition from QCL to CL regime when the device size is scaled. Furthermore, on-voltage is defined to facilitate the modeling and fitting processes. Comparisons with the experimental data demonstrate the model accuracy across all device operation regions and the flexibility in model parameter extraction is also shown.