Memcomputing NP-complete problems in polynomial time using polynomial resources and collective states

TL;DR

This paper demonstrates a memcomputing architecture capable of solving NP-complete problems in a single step using a linear number of memprocessors, leveraging collective states and intrinsic parallelism, with potential for scalable, error-corrected computation.

Contribution

It provides the first experimental proof-of-concept of a memcomputing machine that solves NP-complete problems efficiently using collective states and standard microelectronic technology.

Findings

Solves subset-sum NP-complete problem in one step

Uses a linear number of memprocessors relative to problem size

Fabricated with standard microelectronic technology

Abstract

Memcomputing is a novel non-Turing paradigm of computation that uses interacting memory cells (memprocessors for short) to store and process information on the same physical platform. It was recently proved mathematically that memcomputing machines have the same computational power of non-deterministic Turing machines. Therefore, they can solve NP-complete problems in polynomial time and, using the appropriate architecture, with resources that only grow polynomially with the input size. The reason for this computational power stems from properties inspired by the brain and shared by any universal memcomputing machine, in particular intrinsic parallelism and information overhead, namely the capability of compressing information in the collective state of the memprocessor network. Here, we show an experimental demonstration of an actual memcomputing architecture that solves the NP-complete version of the subset-sum problem in only one step and is composed of a number of memprocessors that scales linearly with the size of the problem. We have fabricated this architecture using standard microelectronic technology so that it can be easily realized in any laboratory setting. Even though the particular machine presented here is eventually limited by noise--and will thus require error-correcting codes to scale to an arbitrary number of memprocessors--it represents the first proof-of-concept of a machine capable of working with the collective state of interacting memory cells, unlike the present-day single-state machines built using the von Neumann architecture.