Approaches for Synthesis Conjectures in an SMT Solver

TL;DR

This paper explores new techniques for handling synthesis conjectures in SMT solvers, focusing on determining unsatisfiability of negated conjectures through innovative quantifier instantiation methods.

Contribution

It introduces novel approaches for synthesis conjecture handling in SMT solvers, emphasizing techniques for quantifier instantiation to improve unsatisfiability detection.

Findings

Enhanced quantifier instantiation techniques

Improved detection of unsatisfiability in synthesis conjectures

Potential for more efficient SMT solving processes

Abstract

This report describes several approaches for handling synthesis conjectures within an Satisfiability Modulo Theories (SMT) solver. We describe approaches that primarily focus on determining the unsatisfiability of the negated form of synthesis conjectures using new techniques for quantifier instantiation.