Algorithms for Mapping Parallel Processes onto Grid and Torus Architectures
Roland Glantz, Henning Meyerhenke, Alexander Noe

TL;DR
This paper introduces new algorithms for static process mapping onto grid and torus architectures, focusing on communication efficiency, and evaluates their performance across various graph types and architectures.
Contribution
The paper develops novel mapping algorithms derived from greedy methods and provides extensive experimental analysis on different application graphs and architectures.
Findings
New algorithms outperform existing methods in maximum congestion.
Partition quality has little impact on mapping quality unless very poor.
One algorithm consistently yields the best results for complex network graphs.
Abstract
Static mapping is the assignment of parallel processes to the processing elements (PEs) of a parallel system, where the assignment does not change during the application's lifetime. In our scenario we model an application's computations and their dependencies by an application graph. This graph is first partitioned into (nearly) equally sized blocks. These blocks need to communicate at block boundaries. To assign the processes to PEs, our goal is to compute a communication-efficient bijective mapping between the blocks and the PEs. This approach of partitioning followed by bijective mapping has many degrees of freedom. Thus, users and developers of parallel applications need to know more about which choices work for which application graphs and which parallel architectures. To this end, we not only develop new mapping algorithms (derived from known greedy methods). We also perform…
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Taxonomy
TopicsInterconnection Networks and Systems · Parallel Computing and Optimization Techniques · Graph Theory and Algorithms
