Algorithm engineering for a quantum annealing platform
Andrew D. King, Catherine C. McGeoch
TL;DR
This paper explores how to optimize quantum annealing algorithms on specialized hardware, discussing operational parameters, error mitigation, and presenting experimental results from a D-Wave processor.
Contribution
It provides insights into tuning quantum annealing algorithms and demonstrates experimental performance on a D-Wave quantum processor.
Findings
Operational parameters significantly affect performance
Error mitigation strategies improve solution quality
Experimental results validate tuning approaches
Abstract
Recent advances bring within reach the viability of solving combinatorial problems using a quantum annealing algorithm implemented on a purpose-built platform that exploits quantum properties. However, the question of how to tune the algorithm for most effective use in this framework is not well understood. In this paper we describe some operational parameters that drive performance, discuss approaches for mitigating sources of error, and present experimental results from a D-Wave Two quantum annealing processor.
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Quantum Information and Cryptography · Quantum-Dot Cellular Automata