Memory effect in ferroelectric single electron transistor: violation of conductance periodicity in the gate voltage

TL;DR

This paper demonstrates that integrating ferroelectric materials into the gate of a single-electron transistor breaks the usual conductance periodicity, leading to a giant memory effect useful for memory devices.

Contribution

It reveals that ferroelectric placement inside the gate capacitance causes conductance periodicity violation and introduces a significant memory effect in single-electron transistors.

Findings

Placement of ferroelectric inside the gate breaks conductance periodicity.

The device exhibits a giant memory effect even with negligible hysteresis.

Current-voltage characteristics depend strongly on ferroelectric polarization.

Abstract

The fundamental property of most single-electron devices with quasicontinuous quasiparticle spectrum on the island is the periodicity of their transport characteristics in the gate voltage. This property is robust even with respect to placing the ferroelectric insulators in the source and drain tunnel junctions. We show that placing the ferroelectric inside the gate capacitance breaks this periodicity. The current-voltage characteristics of this SET strongly depends on the ferroelectric polarization and shows the giant memory-effect even for negligible ferroelectric hysteresis making this device promising for memory applications.