A Software Parallel Programming Approach to FPGA-Accelerated Computing

TL;DR

This paper presents a software programming model integrating FPGA hardware accelerators with CPUs, using a GASNet-compatible hardware engine and software API to enable transparent distributed parallel applications.

Contribution

It introduces a hardware engine and software API for FPGA-accelerated computing within a parallel programming framework, bridging hardware and software communication.

Findings

Hardware engine supports remote memory communication with CPUs.

Software API enables transparent distributed application development.

Compatible with x86 and ARMv7 architectures.

Abstract

This paper introduces an effort to incorporate reconfigurable logic (FPGA) components into a software programming model. For this purpose, we have implemented a hardware engine for remote memory communication between hardware computation nodes and CPUs. The hardware engine is compatible with the API of GASNet, a popular communication library used for parallel computing applications. We have further implemented our own x86 and ARMv7 software versions of the GASNet Core API, enabling us to write distributed applications with software and hardware GASNet components transparently communicating with each other.