Cross-level Validation of Topological Quantum Circuits

TL;DR

This paper introduces a novel cross-level validation method for topological quantum circuits, enabling verification of circuit specifications against physical implementations, which is crucial for scalable quantum computing.

Contribution

The paper presents the first method for cross-level validation of TQC circuits, combining stabilizer formalism, topology mapping, and quantum circuit simulation.

Findings

Validation of error-corrected circuits is feasible

Topology mapping can verify circuit specifications

Simulation confirms the method's effectiveness

Abstract

Quantum computing promises a new approach to solving difficult computational problems, and the quest of building a quantum computer has started. While the first attempts on construction were succesful, scalability has never been achieved, due to the inherent fragile nature of the quantum bits (qubits). From the multitude of approaches to achieve scalability topological quantum computing (TQC) is the most promising one, by being based on an flexible approach to error-correction and making use of the straightforward measurement-based computing technique. TQC circuits are defined within a large, uniform, 3-dimensional lattice of physical qubits produced by the hardware and the physical volume of this lattice directly relates to the resources required for computation. Circuit optimization may result in non-intuitive mismatches between circuit specification and implementation. In this paper we introduce the first method for cross-level validation of TQC circuits. The specification of the circuit is expressed based on the stabilizer formalism, and the stabilizer table is checked by mapping the topology on the physical qubit level, followed by quantum circuit simulation. Simulation results show that cross-level validation of error-corrected circuits is feasible.