Tunable charge-trap memory based on few-layer MoS2

TL;DR

This paper introduces a tunable, high-performance charge-trap memory device using few-layer MoS2 and a 3D Al2O3/HfO2/Al2O3 stack, demonstrating large memory windows, high endurance, and long-term stability.

Contribution

It reports a novel dual-gate MoS2-based charge-trap memory with tunable window size and superior electrical performance, combining 2D materials with traditional high-5 dielectrics.

Findings

Memory window exceeds 20 V

Program/erase current ratio up to 10^4

Stable retention with ~28% charge loss after 10 years

Abstract

Charge-trap memory with high-\k dielectric materials is considered to be a promising candidate for next-generation memory devices. Ultrathin layered two-dimensional (2D) materials like graphene and MoS2 have been receiving much attention because of their novel physical properties and potential applications in electronic devices. Here, we report on a dual-gate charge-trap memory device composed of a few-layer MoS2 channel and a three-dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. Owing to the extraordinary trapping ability of both electrons and holes in HfO2, the MoS2 memory device exhibits an unprecedented memory window exceeding 20 V. More importantly, with a back gate the window size can be effectively tuned from 15.6 to 21 V; the program/erase current ratio can reach up to 104, far beyond Si-based flash memory, which allows for multi-bit information storage. Furthermore, the device shows a high mobility of 170 cm2V-1s-1, a good endurance of hundreds of cycles and a stable retention of ~28% charge loss after 10 years which is drastically lower than ever reported MoS2 flash memory. The combination of 2D materials with traditional high-\k charge-trap gate stacks opens up an exciting field of novel nonvolatile memory devices.