An ECG-SoC with 535nW/channel lossless data compression for wearable sensors

TL;DR

This paper introduces a low power, lossless ECG compression SoC for wearable sensors that significantly reduces data size with minimal power consumption, enabling efficient wireless ECG monitoring.

Contribution

It presents a novel low complexity compression algorithm and an integrated low power SoC design optimized for wearable ECG devices.

Findings

Achieves 2.25x average compression ratio on MIT/BIH ECG database.

Consumes only 535 nW per channel at 2.4V for 512 Hz sampling.

Uses minimal silicon area of 0.4 mm² for 4 channels.

Abstract

This paper presents a low power ECG recording Sys-tem-on-Chip (SoC) with on-chip low complexity lossless ECG compression for data reduction in wireless/ambulatory ECG sensor devices. The proposed algorithm uses a linear slope predictor to estimate the ECG samples, and uses a novel low complexity dynamic coding-packaging scheme to frame the resulting estimation error into fixed-length 16-bit format. The proposed technique achieves an average compression ratio of 2.25x on MIT/BIH ECG database. Implemented in 0.35 {\mu}m process, the compressor uses 0.565 K gates/channel occupying 0.4 mm2 for 4-channel, and consumes 535 nW/channel at 2.4V for ECG sampled at 512 Hz. Small size and ultra-low power consumption makes the proposed technique suitable for wearable ECG sensor application.