The ONSEN Data Reduction System for the Belle II Pixel Detector
Thomas Ge{\ss}ler (1), Wolfgang K\"uhn (1), Jens S\"oren Lange (1),, Zhen'An Liu (2), David M\"unchow (1), Bj\"orn Spruck (1), Jingzhou Zhao (2), ((1) II. Physikalisches Institut, Justus Liebig University Giessen, (2), Institute of High Energy Physics

TL;DR
The paper introduces an FPGA-based online data reduction system, ONSEN, designed for the Belle II pixel detector to significantly decrease background data by region-of-interest filtering, enabling efficient data handling during high-rate experiments.
Contribution
It presents the design, implementation, and testing of the ONSEN system, a novel FPGA-based solution for real-time data reduction in high-energy physics detectors.
Findings
Successfully reduced data volume by a factor of 30.
Verified correct operation with over 20 million events.
Demonstrated real-time filtering based on regions of interest.
Abstract
We present an FPGA-based online data reduction system for the pixel detector of the future Belle II experiment. The occupancy of the pixel detector is estimated at 3 %. This corresponds to a data output rate of more than 20 GB/s after zero suppression, dominated by background. The Online Selection Nodes (ONSEN) system aims to reduce the background data by a factor of 30. It consists of 33 MicroTCA cards, each equipped with a Xilinx Virtex-5 FPGA and 4 GiB DDR2 RAM. These cards are hosted by 9 AdvancedTCA carrier boards. The ONSEN system buffers the entire output data from the pixel detector for up to 5 seconds. During this time, the Belle II high-level trigger PC farm performs an online event reconstruction, using data from the other Belle II subdetectors. It extrapolates reconstructed tracks to the layers of the pixel detector and defines regions of interest around the intercepts.…
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