Performance of the Fully Digital FPGA-based Front-End Electronics for the GALILEO Array

TL;DR

This paper describes a fully digital FPGA-based front-end electronics system for the GALILEO array, demonstrating high energy resolution in gamma-ray detection through innovative digital processing architecture.

Contribution

It introduces a novel fully digital FEE system for gamma-ray detection, integrating FPGA technology and custom software for improved performance.

Findings

Achieved an energy resolution of 1.53 per mil at 1.33 MeV

Developed a digital processing architecture with FPGA and Linux-based control

Demonstrated effective data acquisition for gamma-ray detectors

Abstract

In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. The digital processing of the data from the GALILEO germanium detectors has demonstrated the capability to achieve an energy resolution of 1.53 per mil at an energy of 1.33 MeV.