A Model for Variation- and Fault-Tolerant Digital Logic using Self-Assembled Nanowire Architectures

TL;DR

This paper presents a reservoir computing model based on self-assembled nanowire networks that achieves fault tolerance and reconfigurability for digital logic, outperforming previous approaches in robustness and cost.

Contribution

It extends the echo state network model to realistic nanowire architectures, demonstrating fault-tolerant digital logic implementation with adaptive reconfiguration capabilities.

Findings

System operates with variations 5 orders of magnitude higher than 2005 ITRS targets.

Achieves success rates 6 times higher than related approaches.

System can detect faults and reconfigure to maintain perfect operation.

Abstract

Reconfiguration has been used for both defect- and fault-tolerant nanoscale architectures with regular structure. Recent advances in self-assembled nanowires have opened doors to a new class of electronic devices with irregular structure. For such devices, reservoir computing has been shown to be a viable approach to implement computation. This approach exploits the dynamical properties of a system rather than specifics of its structure. Here, we extend a model of reservoir computing, called the echo state network, to reflect more realistic aspects of self-assembled nanowire networks. As a proof of concept, we use echo state networks to implement basic building blocks of digital computing: AND, OR, and XOR gates, and 2-bit adder and multiplier circuits. We show that the system can operate perfectly in the presence of variations five orders of magnitude higher than ITRS's 2005 target, $\bm{6\%}$, and achieves success rates $\bm{6}$ times higher than related approaches at half the cost. We also describe an adaptive algorithm that can detect faults in the system and reconfigure it to resume perfect operational condition.