Dual Metal-Gate Planar Field-Effect Transistor for Electrostatically Doped CMOS Design

TL;DR

This paper presents a simulation-based study of a reconfigurable planar FET with dual metal gates, enabling dynamic switching between n- and p-type operation for versatile CMOS applications.

Contribution

It introduces a novel electrostatically doped FET design with reconfigurable charge carrier type, based on Schottky S/D junctions on SOI, expanding the functionality of CMOS transistors.

Findings

Device can switch charge carrier type electrically

High-temperature operation enabled by Schottky S/D junctions

Simulation confirms feasibility of reconfigurable FET design

Abstract

In this paper, we demonstrate by simulation the general usability of an electrostatically doped and electrically reconfigurable planar field-effect transistor (FET) structure. The device concept is partly based on our already published and fabricated silicon nanowire 3D-FET technology. The technological key features of this general purpose FET contain Schottky S/D junctions on a silicon-on-insulator (SOI) substrate additionally enabling high-temperature operation of the proposed device. The transistors charge carrier type, i.e. n- or ptype FET, is electrically switchable on the fly by applying a control-gate voltage, which significantly increases the flexibility and versatility in digital integrated circuits.