A Reduced Latency List Decoding Algorithm for Polar Codes

TL;DR

This paper introduces a reduced latency list decoding algorithm for polar codes that significantly decreases decoding time by instantly decoding certain nodes and optimizing maximum-likelihood decoding, improving efficiency especially for medium-length codes.

Contribution

The paper proposes a novel reduced latency list decoding algorithm for polar codes, including instant decoding of specific nodes and simplified maximum-likelihood decoding, reducing decoding latency and complexity.

Findings

Decoding latency reduced by approximately 6.77 times for an (8192, 4096) polar code.

Decoding clock cycles decreased by about 6.97 times with the proposed RLLD algorithm.

The proposed methods maintain error performance while significantly improving decoding speed.

Abstract

Long polar codes can achieve the capacity of arbitrary binary-input discrete memoryless channels under a low complexity successive cancelation (SC) decoding algorithm. But for polar codes with short and moderate code length, the decoding performance of the SC decoding algorithm is inferior. The cyclic redundancy check (CRC) aided successive cancelation list (SCL) decoding algorithm has better error performance than the SC decoding algorithm for short or moderate polar codes. However, the CRC aided SCL (CA-SCL) decoding algorithm still suffer from long decoding latency. In this paper, a reduced latency list decoding (RLLD) algorithm for polar codes is proposed. For the proposed RLLD algorithm, all rate-0 nodes and part of rate-1 nodes are decoded instantly without traversing the corresponding subtree. A list maximum-likelihood decoding (LMLD) algorithm is proposed to decode the maximum likelihood (ML) nodes and the remaining rate-1 nodes. Moreover, a simplified LMLD (SLMLD) algorithm is also proposed to reduce the computational complexity of the LMLD algorithm. Suppose a partial parallel list decoder architecture with list size $L=4$ is used, for an (8192, 4096) polar code, the proposed RLLD algorithm can reduce the number of decoding clock cycles and decoding latency by 6.97 and 6.77 times, respectively.