Towards Cross-layer Reliability Analysis of Transient and Permanent Faults

TL;DR

This paper proposes a cross-layer reliability analysis framework for MPSoCs that concurrently considers transient and permanent faults, bridging the gap between low-level fault effects and system-level reliability assessment.

Contribution

It introduces a novel cross-layer approach that integrates different fault types and connects analysis techniques across abstraction levels using adapters.

Findings

Framework effectively models multiple fault types simultaneously

Bridges reliability analysis across different abstraction levels

Enhances accuracy of system-level reliability predictions

Abstract

Due to the increasing complexity of Multi-Processor Systems on Chip (MPSoCs), system-level design methodologies have got a lot of attention in recent years. However, the significant gap between the system-level reliability analysis and the level where the actual faults occur necessitates a cross-layer approach in which the sufficient data about the effects of faults at low levels are passed to the system level. So far, the cross-layer reliability analysis techniques focus on a specific type of faults, e.g., either permanent or transient faults. In this work, we aim at proposing a cross-layer reliability analysis which considers different fault types concurrently and connects reliability analysis techniques at different levels of abstraction using adapters.