A high-sensitivity gate-based charge sensor in silicon

TL;DR

This paper demonstrates a highly sensitive gate-based charge sensor in silicon, achieving improved charge detection sensitivity and analyzing fundamental noise limits, which could enhance qubit readout in silicon quantum computing architectures.

Contribution

It introduces a silicon nanowire transistor-based gate sensor with enhanced charge sensitivity and provides a detailed analysis of its noise limits and performance compared to traditional sensors.

Findings

Charge sensitivity of 37 μe/√Hz achieved

Comparable performance to conventional charge sensors

Fundamental limits of charge detection identified

Abstract

The implementation of a quantum computer requires a qubit-specific measurement capability to read-out the final state of a quantum system. The model of spin dependent tunneling followed by charge readout has been highly successful in enabling spin qubit experiments in all-electrical, semiconductor based quantum computing. As experiments grow more sophisticated, and head towards multiple qubit architectures that enable small scale computation, it becomes important to consider the charge read-out overhead. With this in mind, Reilly et al. demonstrated a gate readout scheme in a GaAs double quantum dot that removed the need for an external charge sensor. This readout, which achieved sensitivities of order me/$\sqrt(Hz)$, was enabled by using a resonant circuit to probe the complex radio-frequency polarisability of the double quantum dot. However, the ultimate performance of this technology and the noise sources that limit it remain to be determined. Here, we investigate a gate-based readout scheme using a radio-frequency resonant circuit strongly coupled to a double quantum at the corner states of a silicon nanowire transistor. We find a significantly improved charge sensitivity of 37 $\mu$e/$\sqrt(Hz)$. By solving the dynamical master equation of the fast-driven electronic transitions we quantify the noise spectral density and determine the ultimate charge and phase sensitivity of gate-based read-out. We find comparable performance to conventional charge sensors and fundamental limits of order ne/$\sqrt(Hz)$ and $\mu$rad/$\sqrt(Hz)$, with the gate-based sensor improving on standard detection for certain device parameters. Our results show that, especially in state-of-the-art silicon qubit architectures, charge detection by probing the complex polarisability has advantages in terms of reducing the readout overhead but also in terms of the absolute charge sensitivity.