Taking advantage of hybrid systems for sparse direct solvers via task-based runtimes

TL;DR

This paper evaluates the integration of generic task-based runtimes PaRSEC and StarPU into the PaStiX sparse direct solver, demonstrating comparable performance on homogeneous systems and significant speedups on heterogeneous platforms by leveraging accelerators.

Contribution

It introduces a method to replace PaStiX's internal scheduler with generic runtimes, enhancing performance portability across diverse hardware architectures.

Findings

Comparable performance to native scheduler on homogeneous systems

Significant speedups on heterogeneous systems using accelerators

Generic runtimes effectively manage complex hardware heterogeneity

Abstract

The ongoing hardware evolution exhibits an escalation in the number, as well as in the heterogeneity, of computing resources. The pressure to maintain reasonable levels of performance and portability forces application developers to leave the traditional programming paradigms and explore alternative solutions. PaStiX is a parallel sparse direct solver, based on a dynamic scheduler for modern hierarchical manycore architectures. In this paper, we study the benefits and limits of replacing the highly specialized internal scheduler of the PaStiX solver with two generic runtime systems: PaRSEC and StarPU. The tasks graph of the factorization step is made available to the two runtimes, providing them the opportunity to process and optimize its traversal in order to maximize the algorithm efficiency for the targeted hardware platform. A comparative study of the performance of the PaStiX solver on top of its native internal scheduler, PaRSEC, and StarPU frameworks, on different execution environments, is performed. The analysis highlights that these generic task-based runtimes achieve comparable results to the application-optimized embedded scheduler on homogeneous platforms. Furthermore, they are able to significantly speed up the solver on heterogeneous environments by taking advantage of the accelerators while hiding the complexity of their efficient manipulation from the programmer.