Estimation of Optimized Energy and Latency Constraints for Task Allocation in 3d Network on Chip
Vaibhav Jha, Mohit Jha, GK Sharma

TL;DR
This paper introduces a new bio-inspired task allocation algorithm for 3D Network on Chip systems, significantly reducing energy consumption and latency compared to existing methods through dynamic and cluster-based approaches.
Contribution
The paper presents a novel energy-efficient task allocation algorithm for 3D NoC architectures, outperforming existing algorithms like spiral and crinkle in energy and latency reduction.
Findings
Average energy consumption reduced by 49%
Communication cost decreased by 48%
Latency improved by 34%
Abstract
In Network on Chip (NoC) rooted system, energy consumption is affected by task scheduling and allocation schemes which affect the performance of the system. In this paper we test the pre-existing proposed algorithms and introduced a new energy skilled algorithm for 3D NoC architecture. An efficient dynamic and cluster approaches are proposed along with the optimization using bio-inspired algorithm. The proposed algorithm has been implemented and evaluated on randomly generated benchmark and real life application such as MMS, Telecom and VOPD. The algorithm has also been tested with the E3S benchmark and has been compared with the existing mapping algorithm spiral and crinkle and has shown better reduction in the communication energy consumption and shows improvement in the performance of the system. On performing experimental analysis of proposed algorithm results shows that average…
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