A tlm-based platform to specify and verify component-based real-time systems

TL;DR

This paper discusses modeling and verification of component-based real-time systems, highlighting the advantages of TLM 2.0 and SystemC for flexible, abstracted, and efficient system design and verification.

Contribution

Introduces a TLM-based platform utilizing SystemC to improve specification and verification of complex real-time systems, addressing limitations of previous formal languages.

Findings

TLM 2.0 simplifies system modeling.

SystemC supports object-oriented and co-design approaches.

Enhanced verification capabilities for real-time systems.

Abstract

This paper is about modeling and verification languages with their pros and cons. Modeling is dynamic part of system development process before realization. The cost and risky situations obligate designer to model system before production and modeling gives designer more flexible and dynamic image of realized system. Formal languages and modeling methods are the ways to model and verify systems but they have their own difficulties in specifying systems. Some of them are very precise but hard to specify complex systems like TRIO, and others do not support object oriented design and hardware/software co-design in real-time systems. In this paper we are going to introduce systemC and the more abstracted method called TLM 2.0 that solved all mentioned problems.