Modeling the Temperature Bias of Power Consumption for Nanometer-Scale CPUs in Application Processors
Karel De Vogeleer, Gerard Memmi, Pierre Jouvelot, Fabien Coelho

TL;DR
This paper presents a new macro-level model for the temperature-power relationship in nanometer-scale CPUs, validated through experiments, which can improve power measurement accuracy and thermal management in application processors.
Contribution
It introduces a holistic temperature-power model validated with physical measurements, correcting assumptions about exponential relationships and aiding thermal management.
Findings
Power/temperature relationship is likely exponential between 20°C and 85°C.
Quadratic model is accurate for 20°C to 50°C temperature range.
Linear approximation is acceptable within certain temperature ranges.
Abstract
We introduce and experimentally validate a new macro-level model of the CPU temperature/power relationship within nanometer-scale application processors or system-on-chips. By adopting a holistic view, this model is able to take into account many of the physical effects that occur within such systems. Together with two algorithms described in the paper, our results can be used, for instance by engineers designing power or thermal management units, to cancel the temperature-induced bias on power measurements. This will help them gather temperature-neutral power data while running multiple instance of their benchmarks. Also power requirements and system failure rates can be decreased by controlling the CPU's thermal behavior. Even though it is usually assumed that the temperature/power relationship is exponentially related, there is however a lack of publicly available physical…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Low-power high-performance VLSI design · Green IT and Sustainability
