A Novel Approach for Designing Online Testable Reversible Circuits

TL;DR

This paper introduces a new method for designing online testable reversible circuits that can detect single-bit errors during operation, improving reliability and efficiency in low-power computing.

Contribution

The paper proposes a novel approach for creating online testable reversible circuits with proven theorems, reducing gates, garbage outputs, and quantum cost compared to existing methods.

Findings

The proposed design detects single-bit errors during circuit operation.

Experimental results show reduced gate count and quantum cost.

The approach outperforms existing reversible circuit designs in key metrics.

Abstract

Reversible logic is gaining interest of many researchers due to its low power dissipating characteristic. In this paper we proposed a new approach for designing online testable reversible circuits. The resultant testable reversible circuit can detect any single bit error whiles it is operating. Appropriate theorems and lemmas are presented to clarify the proposed design. The experimental results show that our design approach is superior in terms of number of number of gates, garbage outputs and quantum cost.