Improving Memory Hierarchy Utilisation for Stencil Computations on Multicore Machines

TL;DR

This paper proposes an algorithm to optimize block sizes for MPI stencil computations on multicore systems, improving memory hierarchy utilization through an experimental methodology.

Contribution

It introduces a novel algorithm and methodology for selecting efficient block sizes to enhance memory hierarchy use in multicore stencil computations.

Findings

Identifies optimal block sizes for MPI stencil computations.

Demonstrates improved memory utilization on multicore architectures.

Provides an experimental framework for performance evaluation.

Abstract

Although modern supercomputers are composed of multicore machines, one can find scientists that still execute their legacy applications which were developed to monocore cluster where memory hierarchy is dedicated to a sole core. The main objective of this paper is to propose and evaluate an algorithm that identify an efficient blocksize to be applied on MPI stencil computations on multicore machines. Under the light of an extensive experimental analysis, this work shows the benefits of identifying blocksizes that will dividing data on the various cores and suggest a methodology that explore the memory hierarchy available in modern machines.