Multivalued Logic Circuit Design for Binary Logic Interface

TL;DR

This paper presents a multivalued logic circuit design named 'MVL-DEV' that facilitates easier circuit design in multivalued systems and converts outputs into binary, enhancing information density and circuit compactness.

Contribution

It introduces a novel design system for multivalued logic circuits that simplifies design and provides binary conversion, addressing limitations of binary-only devices.

Findings

Design of 'MVL-DEV' for multivalued logic circuits

Enables conversion from multivalued to binary logic

Improves circuit compactness and information density

Abstract

Binary logic and devices have been in used since inception with advancement and technology and millennium gate design era. The development in binary logic has become tedious and cumbersome. Multivalued logic enables significant more information to be packed within a single digit. The design and development of logic circuit becomes very compact and easier. Attempts are being made to fabricate multivalued logic based devices. Since present devices can be implemented only in binary system,it is necessary to evolve a system that can built the circuit in multivalued logic system and convert in binary logic system. In multivalued logic system logic gates differ in different logic system, a quaternary has become mature in terms of logic algebra and gates. Hence logic design based on above system can be done using standard procedure. In this dissertation a logic circuit design entry based on multivalued logic system has been taken up that can provide the ease of circuit design in multivalued system and output as binary valued circuit. The named "MVL-DEV" offers editing, storage and conversion into binary facility.