Synthesizing Multiple Boolean Functions using Interpolation on a Single Proof

TL;DR

This paper introduces a novel method for synthesizing multiple Boolean control signals from complex specifications using a single proof and Craig interpolation, improving efficiency in controller design.

Contribution

It presents a new approach that constructs multiple control functions from one unsatisfiability proof, avoiding iterative synthesis methods.

Findings

Successfully synthesized a controller for a pipelined processor

Demonstrated efficiency by avoiding iterative learning

First experimental results show promise

Abstract

It is often difficult to correctly implement a Boolean controller for a complex system, especially when concurrency is involved. Yet, it may be easy to formally specify a controller. For instance, for a pipelined processor it suffices to state that the visible behavior of the pipelined system should be identical to a non-pipelined reference system (Burch-Dill paradigm). We present a novel procedure to efficiently synthesize multiple Boolean control signals from a specification given as a quantified first-order formula (with a specific quantifier structure). Our approach uses uninterpreted functions to abstract details of the design. We construct an unsatisfiable SMT formula from the given specification. Then, from just one proof of unsatisfiability, we use a variant of Craig interpolation to compute multiple coordinated interpolants that implement the Boolean control signals. Our method avoids iterative learning and back-substitution of the control functions. We applied our approach to synthesize a controller for a simple two-stage pipelined processor, and present first experimental results.