A Novel Reconfigurable Architecture of a DSP Processor for Efficient Mapping of DSP Functions using Field Programmable DSP Arrays
Amitabha Sinha, Mitrava Sarkar, Soumojit Acharyya, Suranjan, Chakraborty

TL;DR
This paper presents a reconfigurable FPGA-based architecture called FPDA, optimized for efficient implementation of various DSP functions, offering improved flexibility, parallelism, and scalability over traditional ASICs and FPGAs.
Contribution
It introduces a novel reconfigurable architecture using fixed common modules for DSP functions, enhancing efficiency and flexibility compared to existing FPGA and ASIC solutions.
Findings
Validated on Virtex5 FPGA with successful reconfiguration
Supports multiple DSP functions like DFT, FFT, DCT, FIR, IIR, DWT
Offers improved flexibility, parallelism, and scalability
Abstract
Development of modern integrated circuit technologies makes it feasible to develop cheaper, faster and smaller special purpose signal processing function circuits. Digital Signal processing functions are generally implemented either on ASICs with inflexibility, or on FPGAs with bottlenecks of relatively smaller utilization factor or lower speed compared to ASIC. Field Programmable DSP Array (FPDA) is the proposed DSP dedicated device, redolent to FPGA, but with basic fixed common modules (CMs) (like adders, subtractors, multipliers, scaling units, shifters) instead of CLBs. This paper introduces the development of reconfigurable system architecture with a focus on FPDA that integrates different DSP functions like DFT, FFT, DCT, FIR, IIR, and DWT etc. The switching between DSP functions is occurred by reconfiguring the interconnection between CMs. Validation of the proposed architecture…
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