Enhanced and continuous electrostatic carrier doping on the SrTiO$_{3}$ surface

TL;DR

This paper reports the development of a hybrid gate insulator for SrTiO3-based FETs that achieves high carrier density and mobility, revealing insights into carrier distribution mechanisms on oxide surfaces.

Contribution

Introduction of a Parylene-C/Ta2O5 hybrid gate insulator enabling high-density electrostatic doping with high mobility on SrTiO3 surfaces, advancing oxide electronics.

Findings

Achieved carrier densities up to 10^13 cm^-2

Maintained field-effect mobility of 10 cm^2/Vs at room temperature

Discovered formation of field domains and current filaments

Abstract

Paraelectrical tuning of a charge carrier density as high as 10$^{13}$\,cm$^{-2}$ in the presence of a high electronic carrier mobility on the delicate surfaces of correlated oxides, is a key to the technological breakthrough of a field effect transistor (FET) utilising the metal-nonmetal transition. Here we introduce the Parylene-C/Ta$_{2}$O$_{5}$ hybrid gate insulator and fabricate FET devices on single-crystalline SrTiO$_{3}$, which has been regarded as a bedrock material for oxide electronics. The gate insulator accumulates up to $\sim10^{13}$cm$^{-2}$ carriers, while the field-effect mobility is kept at 10\,cm$^2$/Vs even at room temperature. Further to the exceptional performance of our devices, the enhanced compatibility of high carrier density and high mobility revealed the mechanism for the long standing puzzle of the distribution of electrostatically doped carriers on the surface of SrTiO$_{3}$. Namely, the formation and continuous evolution of field domains and current filaments.