Hardware Acceleration of the Gipps Model for Real-Time Traffic Simulation
Salim Farah, Magdy Bayoumi

TL;DR
This paper presents an ASIC-based hardware acceleration method for the Gipps traffic model, significantly improving real-time traffic simulation performance by up to 9 times over traditional software approaches.
Contribution
It introduces a novel hardware acceleration approach for the Gipps model in traffic simulation, leveraging ASIC technology for enhanced real-time performance.
Findings
Performance improved by up to 9x with a single processing element
Different hardware configurations offer varying performance gains
Hardware acceleration enables real-time traffic simulation capabilities
Abstract
Traffic simulation software is becoming increasingly popular as more cities worldwide use it to better manage their crowded traffic networks. An important requirement for such software is the ability to produce accurate results in real time, requiring great computation resources. This work proposes an ASIC-based hardware accelerated approach for the AIMSUN traffic simulator, taking advantage of repetitive tasks in the algorithm. Different system configurations using this accelerator are also discussed. Compared with the traditional software simulator, it has been found to improve the performance by as much as 9x when using a single processing element approach, or more depending on the chosen hardware configuration.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsTraffic Prediction and Management Techniques · Vehicular Ad Hoc Networks (VANETs) · Advanced Data Storage Technologies
