A VLSI Design and Implementation for a Real-Time Approximate Reasoning
Masaki Togai, Hiroyuki Watanabe

TL;DR
This paper presents a VLSI chip designed for real-time fuzzy logic inference, emphasizing simplicity, speed, and extensibility, suitable for high-demand applications like robotics and guidance systems.
Contribution
It introduces a novel VLSI fuzzy inference engine with parallel rule execution, high speed operation, and a scalable architecture for real-time expert systems.
Findings
Operates at approximately 20.8 MHz
Achieves about 80,000 FLIPS
Suitable for real-time decision-making applications
Abstract
The role of inferencing with uncertainty is becoming more important in rule-based expert systems (ES), since knowledge given by a human expert is often uncertain or imprecise. We have succeeded in designing a VLSI chip which can perform an entire inference process based on fuzzy logic. The design of the VLSI fuzzy inference engine emphasizes simplicity, extensibility, and efficiency (operational speed and layout area). It is fabricated in 2.5 um CMOS technology. The inference engine consists of three major components; a rule set memory, an inference processor, and a controller. In this implementation, a rule set memory is realized by a read only memory (ROM). The controller consists of two counters. In the inference processor, one data path is laid out for each rule. The number of the inference rule can be increased adding more data paths to the inference processor. All rules are…
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Taxonomy
TopicsEmbedded Systems Design Techniques
MethodsSPEED: Separable Pyramidal Pooling EncodEr-Decoder for Real-Time Monocular Depth Estimation on Low-Resource Settings
