A Multi-objective Perspective for Operator Scheduling using Fine-grained DVS Architecture

TL;DR

This paper presents a multi-objective operator scheduling approach using fine-grained DVS architecture, optimizing power and area trade-offs with a branch-and-bound algorithm to find Pareto-optimal solutions.

Contribution

It introduces a novel branch-and-bound algorithm for operator scheduling that explores the design space considering power and area trade-offs enabled by DVFS units.

Findings

The algorithm effectively finds Pareto-optimal solutions for complex benchmarks.

Relaxing timing constraints yields significant area and power savings.

Power or area constraints improve scheduling performance.

Abstract

The stringent power budget of fine grained power managed digital integrated circuits have driven chip designers to optimize power at the cost of area and delay, which were the traditional cost criteria for circuit optimization. The emerging scenario motivates us to revisit the classical operator scheduling problem under the availability of DVFS enabled functional units that can trade-off cycles with power. We study the design space defined due to this trade-off and present a branch-and-bound(B/B) algorithm to explore this state space and report the pareto-optimal front with respect to area and power. The scheduling also aims at maximum resource sharing and is able to attain sufficient area and power gains for complex benchmarks when timing constraints are relaxed by sufficient amount. Experimental results show that the algorithm that operates without any user constraint(area/power) is able to solve the problem for most available benchmarks, and the use of power budget or area budget constraints leads to significant performance gain.