Embedded Online Optimization for Model Predictive Control at Megahertz Rates
Juan L. Jerez, Paul J. Goulart, Stefan Richter, George A., Constantinides, Eric C. Kerrigan, Manfred Morari

TL;DR
This paper introduces custom FPGA architectures for fast, low-power optimization in model predictive control, enabling MHz-rate control on resource-limited embedded devices.
Contribution
It presents novel FPGA-based computational architectures for first-order optimization methods tailored for embedded MPC, ensuring reliable operation with reduced precision arithmetic.
Findings
Achieves control at over 1 MHz sample rate on low-end FPGA devices.
Demonstrates reliable MPC operation with fixed-point arithmetic.
Provides analysis for robustness of the control system.
Abstract
Faster, cheaper, and more power efficient optimization solvers than those currently offered by general-purpose solutions are required for extending the use of model predictive control (MPC) to resource-constrained embedded platforms. We propose several custom computational architectures for different first-order optimization methods that can handle linear-quadratic MPC problems with input, input-rate, and soft state constraints. We provide analysis ensuring the reliable operation of the resulting controller under reduced precision fixed-point arithmetic. Implementation of the proposed architectures in FPGAs shows that satisfactory control performance at a sample rate beyond 1 MHz is achievable even on low-end devices, opening up new possibilities for the application of MPC on embedded systems.
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