Two-dimensional ion trap lattice on a microchip
R. C. Sterling, H. Rattanasonti, S. Weidt, K. Lake, P. Srinivasan, S., C. Webster, M. Kraft, W. K. Hensinger

TL;DR
This paper presents a novel fabrication process enabling high-voltage application to microfabricated ion traps, leading to a reliable 2D ion lattice on a chip with improved stability and control for quantum computing applications.
Contribution
It introduces a new fabrication method that allows for high-voltage microfabricated ion traps, enabling the creation of a 2D ion lattice with enhanced capabilities.
Findings
Reliable trapping of 2D ion lattices achieved
Long ion lifetimes demonstrated
Ability to introduce defects deterministically
Abstract
Microfabricated ion traps are a major advancement towards scalable quantum computing with trapped ions. The development of more versatile ion-trap designs, in which tailored arrays of ions are positioned in two dimensions above a microfabricated surface, would lead to applications in fields as varied as quantum simulation, metrology and atom-ion interactions. Current surface ion traps often have low trap depths and high heating rates, due to the size of the voltages that can be applied to them, limiting the fidelity of quantum gates. Here we report on a fabrication process that allows for the application of very high voltages to microfabricated devices in general and use this advance to fabricate a 2D ion trap lattice on a microchip. Our microfabricated architecture allows for reliable trapping of 2D ion lattices, long ion lifetimes, rudimentary shuttling between lattice sites and the…
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