A Polynomial Time Algorithm for Finding Area-Universal Rectangular Layouts
Jiun-Jie Wang

TL;DR
This paper presents a polynomial time algorithm to determine if a given plane graph has an area-universal rectangular layout, improving upon previous exponential algorithms and addressing prior correctness concerns.
Contribution
The paper introduces the first true polynomial time algorithm for identifying area-universal rectangular layouts, resolving previous doubts about algorithm correctness.
Findings
Provides a polynomial time algorithm for the problem.
Addresses and corrects previous algorithm correctness issues.
Enhances understanding of rectangular layout realizability.
Abstract
A rectangular layout is a rectangle partitioned into disjoint smaller rectangles so that no four smaller rectangles meet at the same point. Rectangular layouts were originally used as floorplans in VLSI design to represent VLSI chip layouts. More recently, they are used in graph drawing as rectangular cartograms. In these applications, an area is assigned to each rectangle , and the actual area of in is required to be . Moreover, some applications require that we use combinatorially equivalent rectangular layouts to represent multiple area assignment functions. is called {\em area-universal} if any area assignment to its rectangles can be realized by a layout that is combinatorially equivalent to . A basic question in this area is to determine if a given plane graph has an area-universal rectangular layout…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsComputational Geometry and Mesh Generation · VLSI and FPGA Design Techniques · Optimization and Packing Problems
