MIMS: Towards a Message Interface based Memory System
Licheng Chen, Tianyue Lu, Yanan Wang, Mingyu Chen, Yuan Ruan, Zehan, Cui, Yongbing Huang, Mingyang Chen, Jiutian Zhang, Yungang Bao

TL;DR
This paper proposes MIMS, a message-based memory interface that enhances communication flexibility, improves performance, energy efficiency, and bandwidth utilization in chip multiprocessor systems by replacing traditional bus-based memory interfaces.
Contribution
It introduces a universal, scalable message interface for memory systems, enabling more intelligent memory management and better integration of emerging memory technologies.
Findings
Performance improved by 53.21%
Energy delay product reduced by 55.90%
Bandwidth utilization increased by 62.42%
Abstract
Memory system is often the main bottleneck in chipmultiprocessor (CMP) systems in terms of latency, bandwidth and efficiency, and recently additionally facing capacity and power problems in an era of big data. A lot of research works have been done to address part of these problems, such as photonics technology for bandwidth, 3D stacking for capacity, and NVM for power as well as many micro-architecture level innovations. Many of them need a modification of current memory architecture, since the decades-old synchronous memory architecture (SDRAM) has become an obstacle to adopt those advances. However, to the best of our knowledge, none of them is able to provide a universal memory interface that is scalable enough to cover all these problems. In this paper, we argue that a message-based interface should be adopted to replace the traditional bus-based interface in memory system. A…
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