Data Mapping for Unreliable Memories

TL;DR

This paper investigates the impact of unreliable memories on DSP systems and introduces a framework for designing data representations that improve system robustness and error-rate performance.

Contribution

It proposes a novel framework for characterizing unreliable memories and designing optimized data representations to mitigate performance loss in DSP systems.

Findings

Optimized data representations significantly improve error-rate performance.

The framework effectively characterizes the impact of unreliable memories.

Designed data formats outperform conventional representations in reliability.

Abstract

Future digital signal processing (DSP) systems must provide robustness on algorithm and application level to the presence of reliability issues that come along with corresponding implementations in modern semiconductor process technologies. In this paper, we address this issue by investigating the impact of unreliable memories on general DSP systems. In particular, we propose a novel framework to characterize the effects of unreliable memories, which enables us to devise novel methods to mitigate the associated performance loss. We propose to deploy specifically designed data representations, which have the capability of substantially improving the system reliability compared to that realized by conventional data representations used in digital integrated circuits, such as 2s complement or sign-magnitude number formats. To demonstrate the efficacy of the proposed framework, we analyze the impact of unreliable memories on coded communication systems, and we show that the deployment of optimized data representations substantially improves the error-rate performance of such systems.