Deadlock Recovery Technique in Bus Enhanced NoC Architecture

TL;DR

This paper proposes a deadlock recovery method in a bus-enhanced NoC architecture, utilizing a global bus as an escape path to improve performance under traffic congestion.

Contribution

It introduces a novel deadlock recovery technique using a global bus in NoC, combining advantages of bus and network-on-chip architectures.

Findings

Bus-based deadlock recovery improves throughput.

Simulation shows reduced deadlock occurrence.

Enhanced performance under non-uniform traffic patterns.

Abstract

Increase in the speed of processors has led to crucial role of communication in the performance of systems. As a result, routing is taken into consideration as one of the most important subjects of the Network on Chip architecture. Routing algorithms to deadlock avoidance prevent packets route completely based on network traffic condition by means of restricting the route of packets. This action leads to less performance especially in non-uniform traffic patterns. On the other hand True Fully Adoptive Routing algorithm provides routing of packets completely based on traffic condition. However, deadlock detection and recovery mechanisms are needed to handle deadlocks. Use of global bus beside NoC as a parallel supportive environment, provide platform to offer advantages of both features of bus and NoC. This bus is useful for broadcast and multicast operations, sending delay sensitive signals, system management and other services. In this research, we use this bus as an escaping path for deadlock recovery technique. According to simulation results, this bus is suitable platform for deadlock recovery technique.