OLTP on Hardware Islands

TL;DR

This paper analyzes how hardware heterogeneity impacts OLTP performance and advocates for topology-aware shared-nothing database deployments to optimize resource utilization and transaction efficiency.

Contribution

It provides a detailed performance analysis of OLTP on heterogeneous hardware and proposes topology-aware shared-nothing strategies for better performance.

Findings

Hardware heterogeneity affects OLTP performance unpredictably.

Shared-nothing deployments can better utilize hardware resources.

Topology-aware configurations improve transaction efficiency.

Abstract

Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and to the processor caches, which causes variability in the communication costs. Unfortunately, database systems mostly assume that all processing cores are the same and that microarchitecture differences are not significant enough to appear in critical database execution paths. As we demonstrate in this paper, however, hardware heterogeneity does appear in the critical path and conventional database architectures achieve suboptimal and even worse, unpredictable performance. We perform a detailed performance analysis of OLTP deployments in servers with multiple cores per CPU (multicore) and multiple CPUs per server (multisocket). We compare different database deployment strategies where we vary the number and size of independent database instances running on a single server, from a single shared-everything instance to fine-grained shared-nothing configurations. We quantify the impact of non-uniform hardware on various deployments by (a) examining how efficiently each deployment uses the available hardware resources and (b) measuring the impact of distributed transactions and skewed requests on different workloads. Finally, we argue in favor of shared-nothing deployments that are topology- and workload-aware and take advantage of fast on-chip communication between islands of cores on the same socket.