Fabrication and Electrical Characterization of Fully CMOS Si Single Electron Devices

TL;DR

This paper demonstrates the fabrication of silicon single electron devices using CMOS technology, showing their stable electrical properties and potential for scalable quantum device applications.

Contribution

It introduces a CMOS-compatible fabrication process for silicon single electron devices with high stability and robustness, advancing scalable quantum electronics.

Findings

Devices show clean Coulomb diamonds at 30 mK

Charge offset drift of 0.01 e over eight days

Threshold voltage uniformity within 0.5 V

Abstract

We present electrical data of silicon single electron devices fabricated with CMOS techniques and protocols. The easily tuned devices show clean Coulomb diamonds at T = 30 mK and charge offset drift of 0.01 e over eight days. In addition, the devices exhibit robust transistor characteristics including uniformity within about 0.5 V in the threshold voltage, gate resistances greater than 10 G{\Omega}, and immunity to dielectric breakdown in electric fields as high as 4 MV/cm. These results highlight the benefits in device performance of a fully CMOS process for single electron device fabrication.