Performance Analysis of Unsymmetrical trimmed median as detector on image noises and its Fpga implementation

TL;DR

This paper evaluates an Unsymmetrical Trimmed Median detector for various image noises and implements it efficiently on FPGA, demonstrating its effectiveness in noise removal with low resource usage.

Contribution

It introduces a novel unsymmetrical trimmed median algorithm for noise detection and provides an FPGA implementation optimized for speed and resource efficiency.

Findings

Effectively removes high-density impulse noise and Gaussian noise.

Uses less FPGA resources compared to other median architectures.

Achieves good noise suppression with low power consumption.

Abstract

This Paper Analyze the performance of Unsymmetrical trimmed median, which is used as detector for the detection of impulse noise, Gaussian noise and mixed noise is proposed. The proposed algorithm uses a fixed 3x3 window for the increasing noise densities. The pixels in the current window are arranged in sorting order using a improved snake like sorting algorithm with reduced comparator. The processed pixel is checked for the occurrence of outliers, if the absolute difference between processed pixels is greater than fixed threshold. Under high noise densities the processed pixel is also noisy hence the median is checked using the above procedure. if found true then the pixel is considered as noisy hence the corrupted pixel is replaced by the median of the current processing window. If median is also noisy then replace the corrupted pixel with unsymmetrical trimmed median else if the pixel is termed uncorrupted and left unaltered. The proposed algorithm (PA) is tested on varying detail images for various noises. The proposed algorithm effectively removes the high density fixed value impulse noise, low density random valued impulse noise, low density Gaussian noise and lower proportion of mixed noise. The proposed algorithm is targeted on Xc3e5000-5fg900 FPGA using Xilinx 7.1 compiler version which requires less number of slices, optimum speed and low power when compared to the other median finding architectures.