Spin-Based Neuron Model with Domain Wall Magnets as Synapse

TL;DR

This paper introduces a spin-based neural network architecture using nano-magnets for neurons and synapses, achieving ultra low voltage operation, reduced power consumption, and high integration density, demonstrated through a character recognition benchmark.

Contribution

It presents a novel spin device-based neural network design with ultra low voltage operation and significant power efficiency improvements over traditional CMOS implementations.

Findings

95% lower power consumption compared to 45nm CMOS design

Operates locally at 30mV supply voltage

Successful simulation of character recognition task

Abstract

We present artificial neural network design using spin devices that achieves ultra low voltage operation, low power consumption, high speed, and high integration density. We employ spin torque switched nano-magnets for modelling neuron and domain wall magnets for compact, programmable synapses. The spin based neuron-synapse units operate locally at ultra low supply voltage of 30mV resulting in low computation power. CMOS based inter-neuron communication is employed to realize network-level functionality. We corroborate circuit operation with physics based models developed for the spin devices. Simulation results for character recognition as a benchmark application shows 95% lower power consumption as compared to 45nm CMOS design.