A low power high bandwidth four quadrant analog multiplier in 32 nm CNFET technology

TL;DR

This paper introduces a novel four quadrant analog multiplier using 32nm CNFET technology, achieving high bandwidth, low power consumption, and low harmonic distortion for advanced analog applications.

Contribution

It presents a new CNFET-based analog multiplier design with superior bandwidth, power efficiency, and harmonic performance compared to traditional silicon-based counterparts.

Findings

Bandwidth of ~50GHz achieved

Harmonic distortion less than 0.45%

Power consumption around 247μW

Abstract

Carbon Nanotube Field Effect Transistor (CNFET) is a promising new technology that overcomes several limitations of traditional silicon integrated circuit technology. In recent years, the potential of CNFET for analog circuit applications has been explored. This paper proposes a novel four quadrant analog multiplier design using CNFETs. The simulation based on 32nm CNFET technology shows that the proposed multiplier has very low harmonic distortion (<0.45%), large input range ({\pm}400mV), large bandwidth (~50GHz) and low power consumption (~247{\mu}W), while operating at a supply voltage of {\pm}0.9V.